1. Field of the Invention
The present invention relates to a verify read operation of a nonvolatile semiconductor memory.
2. Description of the Related Art
A nonvolatile semiconductor memory in which one cell unit is composed of a plurality of memory cells, a
NAND flash memory, for example (refer to U.S. Patent Application Publication No. 2004/0109357, for example) is required to narrow the width of a threshold distribution of the memory cell in a written state by lowering an operation voltage, and storing three or more values in one memory cell to implement a multi-level cell.
To satisfy this request, a write method such as QPW (Quick Pass Write) has been proposed. According to the technique of the QPW, the threshold voltage of the memory cell after written is classified to one of a first group in a first threshold range before completion of writing, a second group in a second threshold range higher than the first threshold range before completion of writing, and a third group in a third threshold range higher than the second threshold range after completion of writing, and a write condition is varied according to the three groups at the time of a rewrite operation.
For example, at the time of rewrite operation, a bit line is set to a first potential and a usual write operation is performed in the memory cell classified to the first group, a bit line is set to a second potential higher than the first potential and a write operation weaker (threshold shift width is smaller) than the usual write operation is performed in the memory cell classified to the second group, and a bit line is set to a third potential higher than the second potential and the write operation is inhibited in the memory cell classified to the third group.
However, since the threshold voltage of the memory cell after written is classified to one of the three groups in the QPW, two verify read operations are required.
For example, at the time of first verify read operation, a first verify read potential is applied to a selected word line and the threshold voltage of the memory cell after written is read to verify whether it belongs to the first group or not. Then, at the time of second verify read operation, a second verify read potential is applied to the selected word line, and the threshold voltage of the memory cell after written is read to verify whether it belongs to the second or third group.
Thus, since the two verify read operations are needed in the QPW, the problem is that a write time is increased. As for the multi-level nonvolatile semiconductor memory especially, since an operation of loading data in the memory cell is added before write operation, the increase in write time is a serious problem.